What is RiscY?
RiscY is a simple, 32-bit RISC-V System that is designed to be easy to understand and implement. It has been created by students in the University of Thessaly.
RiscY is written in Verilog and aims to be a complete system. It includes Basic input and output like screen, buttons and external memory.
Why RiscY?
RiscY is a great way to learn about computer architecture and digital design because it is simple and easy to understand. It is a good starting point for anyone who is interested in learning about how computers work at a low level.
It is also a good way to learn about the RISCV architecture, which is a popular RISC architecture that is used in many embedded systems and educational environments.
RiscY Showcase
Here is a showcase of RiscY running on an FPGA board. The board is connected to a screen and some buttons that allow you to interact with the system.
Documentation
You can follow our documentation to learn how to build RiscY and run it on an FPGA board. The documentation includes step-by-step instructions and explanations of how the system works.